Embodiments of the inventive concept relate generally to nonvolatile memory devices. More particularly, embodiments of the inventive concept relate to flash memory devices configured to reduce noise from a common source line, methods of operating the same, and memory systems incorporating the same.
Semiconductor memory devices can be broadly classified as volatile memory devices or nonvolatile memory devices based on whether they retain stored data when disconnected from power. Volatile memory devices lose stored data when disconnected from power and nonvolatile memory devices retain stored data when disconnected from power.
Examples of volatile memory devices include dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices. Examples of nonvolatile memory devices include electrically erasable and programmable read-only memory (EEPROM) devices, ferroelectric random access memory (FRAM) devices, phase-change random access memory (PRAM) devices, magnetic random access memory (MRAM) devices, and flash memory devices.
Flash memory devices, as compared with other types of nonvolatile memory devices, have relatively high programming speed, low power consumption, and large data storage capacity. Accordingly, flash memory devices are commonly used as data storage media in various fields requiring low-power and large-capacity storage devices, such as MP3 players, digital cameras, solid state drives (SSDs), and computer systems.
A flash memory device comprises a memory cell array that stores data. The memory cell array comprises a plurality of memory blocks, each of the memory blocks comprises a plurality of pages, and each of the pages comprises a plurality of memory cells. Due to its structural characteristics, the flash memory device performs erase operations on a memory block basis and performs read and write operations on a page basis.
Some flash memory devices store one bit of data per memory cell, and some flash memory devices store two or more bits of data per memory cell. A memory cell that stores one bit of data is called a single-level cell (SLC), and a memory cell that stores at least two bits of data is called a multi-level cell (MLC). An SLC has an erase state and a program state that correspond to two different threshold voltage distributions of the SLC. The MLC has an erase state and a plurality of program states that correspond to more than two different threshold voltage distributions of the MLC.
In a flash memory device comprising MLCs, it is important to maintain adequate margins between the different threshold voltage distributions so that different states can be distinguished from each other. One way to maintain adequate margins is to ensure that the threshold voltage distributions remain narrow, i.e., that they do not spread out. The threshold voltage distributions tend to spread out due to factors such as poor programming and electrical interference such as various forms of noise. Accordingly, reducing or eliminating these factors can lead to improved margins.
One form of noise that can cause threshold voltage distributions to spread out is common source line (CSL) noise, which is generated on a CSL connected to bit lines through a ground select transistor. The CSL noise typically occurs due to changes to the resistance of the CSL.